Getting Started with the EBAZ4205 as a Zynq-7000 Development Board

The EBAZ4205 is the least costly Zynq-7000 based board that I luckily happened to chance upon. However, it wasn’t my first Zynq-7000 board.

That happened to be the MYIR’s (Make Your Ideas Real) Z-Turn board (with a Zynq-7010 SoC). I purchased this board for approximately Ksh. 12,000. It was to be my gateway into FPGAs, my little sandbox to implement concepts I was learning since I’m more practical oriented than a pure theorist. Unfortunately, the board suffered some sort of short circuit failure and that put a halt to most of my FPGA plans.

The Z-Turn Board (the Zynq-7010 SoC Option)

I was rather upset at this turn of events, and the thought of spending another Ksh. 12,000 to replace the board was out of the question.

It seemed like all FPGA related activities were to be suspended, but out of my desperation to find some sort of replacement board, I came across a Reddit post that talked of some Zynq-7000 boards out of China that were from decommissioned Bitcoin mining rigs that were going for the cheap, around $10; additionally, they could be reconfigured as development boards.

I figured that this was my second wind and immediately got onto AliExpress and ordered myself a board.

Is It a Development Board?

The EBAZ4205 was not designed as a development board, and as such, there isn’t an official documentation to refer to when trying to get started. However, this doesn’t mean that there isn’t a lot of good information out there, only that it is kind of scattered. Thus, this blog post is simply a documentation of some of the steps I had to take from initially getting the EBAZ4205, to programming it with some digital logic. I try to make it as straightforward as possible for a beginner, but there will be links to supplementary materials to further explore some of the finer details that have been documented elsewhere.

I’ll be going through some hardware modifications that are required, and briefly introduce a simple Vivado workflow as that’s my tool of choice for programming the EBAZ4205 board. So get your soldering iron and computer on standby and let’s get hacking.

Before I get started, I should mention that most of my information on the EBAZ4205 was obtained from the xjtuecho/EBAZ4205 github repository, and reading up on various discussions that were had on the EBAZ4205 Telegram group. Be sure to check out both sources for a lot more material on the EBAZ4205 should you want to learn more.

The EBAZ4205 Board

I got my EBAZ4205 from AliExpress, but I also saw that there were some listings on eBay. I got my board for Ksh. 2,080 in June of 2021, but as of November 2021 the price is getting closer to Ksh. 3,000; get there is some demand for the boards.

The state in which your EBAZ4205 board arrives does depend on where you bought it from. Sometimes the board my come fully modded out, ready for development, but more often than not you may need to add some components to get the board more complete to work with. For a detailed breakdown of the various hardware components that may be missing on a board and what the specific components do, check out this xjtuecho/EBAZ4205 wiki entry.

Some of the components that I chose to get on the board are:

  • microSD card holder: this one did come preinstalled on my board. This is really useful to have early on as a way to program the board if you do not have a JTAG programmer.
  • header pins for UART and JTAG: these are pretty usually for communicating with the board (UART) and programming the board (JTAG)
  • D24 diode: this is for powering the board through the 6 pin molex connector, though you could also power the board through the 12V and GND lines on the DATA 1, DATA 2 or DATA 3 lines. I got the SK810L model as I couldn’t quite find the recommended SS810 but the model numbers are close enough and the packaging is the same.
  • JTAG programmer: while you could program the EBAZ4205 using a microSD card, for prototyping and testing out designs, it could really help to have a JTAG programmer to upload adjustments rather than swapping out SD cards. I’ll talk about a good JTAG option later in the post.
  • optocouplers: i installed these ones optocouplers mostly as an “i’d rather have them and not need them than need them and not have them”. It hasn’t really added to the experience thus far, so they can be skipped.
  • 25 MHz crystall oscillator: if your board doesn’t come with a crystall oscillator, which provides a clock signal to the ethernet transceiver (IP101GA), you don’t need to get one since it is easier to get the PL side of the Zynq SoC to provide the clock signal (I’ll probably write a separate post on this because it did take me a while to get an understanding on this). But if you choose to get the 25 MHZ crystall, it is important to know that you’ll need to also get two 22 pF capacitors (I am not sure of the SMD size), and remove the R1485 resistor.
If you want to add Y3 the 25 MHz Crystall, you need to also add capacitors C380 and C377 and remove resistor R1485

First Booting

Powering the EBAZ4205 using DATA 1 Pin 1 (12 V) and DATA 1 Pin 3 (GND)

When your board first arrives, and before you solder anything on it, (though probably soldering at least the UART header pin might be useful to monitor some of the output), you could power it on and see if it does work.

For the first boot you could provide a 12V across the 12V (Pin 1) and GND (Pin 3) lines of DATA 1, DATA 2 or DATA 3. You could also connect an ethernet cable between your computer and the board just to create some random local network. Upon providing power to the board should see a couple of green LEDs light up: LED4 that shows the board is powered up, and LED1 to show that the Zynq-7010 is running a program (this is the bitcoin mining rig program that the board was running). Also the two LEDs on the left of the RJ45 housing should light up and then after quite a while the board should possibly default to alternating between red and green, I think this means the board has been unable to communicate with the mining rig which is definitely missing in our setup. The RJ45 LEDs should also be flashing. If you get this particular light show, your board is most likely to be functional. If not, you may need to investigate further to determine the state of your board.

Booting from the SD Card

Resistor Connections to Achieve Various Boot Modes on the EBAZ4205

In it’s default state, the EBAZ4205 boots from the NAND. However, in order to program it using the SD Card we’d need to change up a couple of resistors. Above is a truth table on how to connect the ports of IO0 and IO2 for various boot modes. The board will come with a resistor connected to R2584 to pull IO0 to ground and another resistor connected to R2578 to pull IO2 to Vcc. To boot into SD Card mode, we’d need to move the resistor connected to IO0 from R2584 to R2577 to pull IO0 up to Vcc. NB: the value of the pull up/pull down resistors connected to IO0 and IO2 is 20k.

Switch the resistor from R2584 to R2577 to Enable Booting from microSD Card

What about JTAG?

Now while booting from the microSD can be pretty convenient to start of, it can get pretty tedious when you have to keep swapping SD Cards whenever you modify a particular design, or want to run a different design. Thus, I would recommend getting a JTAG programmer early on, for the sake of your development sanity.

Xilinx JTAG programmers can be pretty pricey, most being more than the cost of your EBAZ4205, but worry not, you do not have to buy a JTAG programmer. You can make one yourself by modifying an FT2232H board.

To make the FT2232H board into a Vivado compatible JTAG, follow the steps outlined in this link (part 3 can be skipped if you are programming a brand new FT2232H board); you will need a computer running linux for this part. At the end of the process you should not only have a JTAG programmer, but you’ll also have a UART on the same board; the JTAG will be on the ADBUS, while the UART will be on the CDBUS with pin outs as shown below.

FT2232H JTAG (ADBUS) and UART (CDBUS) Pinout

The corresponding pinouts on the EBAZ4205 board for the JTAG and UART is shown below.

UART and JTAG on the EBAZ4205 Board

Something to note though is that in the current state, the EBAZ4205 board is set to boot from the SD Card, rather than primed for JTAG. However, we do not need to move any resistors around, if no microSD card is loaded, the EBAZ4205 will automatically go into JTAG mode.

For the purpose of this tutorial I will be using the JTAG to program a design that only needs to run on the programmable logic (PL) side of the Zynq SoC and not using the processing system (PS) which the microSD card will need. However, if you want to see how to use the microSD card to run a design you should probably check out this video, which uses an extra program, Vitis, for programming the PS side. Now, if you don’t know what PL and PS standfor, you can learn about that from the video I’ve just linked it gives a primer into the Zynq-7000 SoC architecture.

A Simple AND Gate

The EBAZ4205 board is a Zynq-7010 board which basically combines a dual core ARM processing chip with an FPGA and it can be overwhelming to get started since the board can do a lot. My primary goal with this was to get started with FPGAs then scale upwards towards the ARM stuff so for this first test, I wasn’t aiming to be get into the bells and whistles of the EBAZ4205, I simply wanted to run a simple digital design on the Zynq’s PL. For this I chose to make a simple AND gate just to verify that the board works and I could be programme it.

For this I shall be using Vivado 2020.2. This is a pretty huge software clocking in at 16 GB, so it really isn’t for those not committed to the cause.

Before getting started you can install the EBAZ4205 board files by following the steps outlined here.

This will be a visual heavy presentation, when you are getting started it can be quite confusing. After messing around with Vivado for quite a while, I’ve come to learn that there are multiple ways to get things done, so what I present here is just one way. I won’t be going into detail because that would make this post longer than I really would like it to be. However, I will refer you to a book that, while I did not read it (I chose the hard path of watching multiple YouTube videos immitating the workflow and filling in the blanks over time with experimentation) it does offer a good writeup on the Vivado workflow. The book is “Digital System Design with FPGA – Implementation Using Verilog and VHDL” by Cem Unsalan & Bora Tar. I did say I am a practical oriented person, so I chose to mess around with Vivado rather than read Chapter 4 of the book, which contained really useful info.

For this AND gate, I’ll be using the in built red LED connect to pin W14 as the output and input will be connect to DATA 3-07 and DATA3-09 i.e. pin P18 and pin N17 respectively. Something to note, the HDL code I’ll be writing will technically be for a NAND gate, but the on board red and green LED seem to have an inverter connected to it (still haven’t figured this out) so to have an AND gate functionality at the end of the day I’d have to create a NAND gate. However, using an I/O pin on such as DATA3-13 i.e. pin R18 would result in an AND gate. And the last thing to note, the EBAZ4205 I/O pins are rated for 3.3 V. There was a point when I hooked up 5 V and things we behaving strangely so do keep that in mind, use 3.3 V for your external switches connected to DATA3-07 and DATA3-09.

I/O Pin Names for the DATA Pins

Okay, let’s get started:

  1. Start by opening Vivado and select “Create Project” to create a new project.

2. Next up, give your project a name, and be sure to have “Create project subdirectory” selected

3. Select “RTL Project” as your project type and check “Do not specify sources at this time”.

4. In the “Default Part” window, select the “Boards” tabs and search for “ebaz4205”. This should bring up the board file. This is assuming you installed the board files as I’d stated earlier in the post. If not you should probably cancel the process install the board files then get back to step one.

5. Your project summary should look as shown below.

6.A new window will be brought up. On the extreme left you’ll have the ‘Flow Navigator’. You’ll want to click on the “Create Block Design” option under ‘IP INTEGRATOR” to start your design.

7. Give your design a name

8. Next click on “Add Sources” under ‘Project Manager’ to add your digital design

9. Select the “Add or create design sources” radio button

10. Select “Create File” to start the process of creating your HDL file

11. For this design, I’ll be using Verilog as my HDL of choice, thus I’ll select it as the ‘File Type’. Next you give your HDL file a name.

12. You should see the file you just created appear in the dialog box.

13. When the “Define Module” box is brought up just click on OK and YES.

14. Now let us edit the Verilog file to have our and gate design. And once that is done, we will need to add a constraints file. Click “Add Sources”. NB: technically, the code written here is for a NAND gate, but for some reason that on board red and green LEDs invert the logic. However, if you are using an external LED connected to an I/O port on DATA 1/DATA 2/DATA 3 you’d remove the ~ on line 8

15. This time around select the “Add or create constraints” radio button

16. Select ‘File Type’ as XDC and give your file a name

17. Add the physical constraints definitions of the input ports and the outputs that you’d like to use in your design. Of importance here is names of the inputs and output for our AND gate. LED is the output and sw0 and sw1 are the input

18. Create a HDL Wrapper by expanding “Design Sources” in the “Sources” tab, and right clicking the source you created earlier.

19. Let Vivado manager the wrapper for you. This will track any changes you make in future.

20. Add the Module to Block Design to have a visual representation of your design

21. If it isn’t already displayed, click on Diagram to see your design.

22. Next, we need to make connections to the various gate ports. Select a port, right click it and choose the “Make External” option

23. Rename the ports to match the names you chose in the Constraints file in step 17

24. Confirm all the names

25. Now we are ready to Generate Bitstream

26. If you hadn’t been saving your work, Vivado will remind you to, thus it is best to heed this prompt.

27. Vivado will need to run the “Synthesis” and “Implementation” processes before a bitstream can be generated, so simply click yes.

28. Number of jobs can be 1 to 8. Still not sure what this does (you could read further for your own knowledge or let me know in the comments if you do) but 1 seemed to work for this design.

29. Check that the program is running by checking the top right corner. You could also check out the Design Runs tab on the bottom window to see what process Vivado is currently running

30. Once the Bitstream is Generated, click Open Hardware Manager. Note that steps beyond this point will only be relevant if you have a working JTAG

31. From the Hardware Manager tab, select Open Target and Auto Connect to detect your JTAG programmer.

32. If your JTAG is detected, it should be listed in the Hardware window along with the EBAZ4205. At this point you should be able to program the device.

33. Select the generated bitstream and you should be good to go.

If you followed the above steps you should have a working design loaded on the programmable logic side of your EBAZ. If you want to use the microSD card to program your device, you’ll need to add a Zynq Processing system and launch Vitis to create a boot image. I shall not be talking about that, but this link should give you the needed guidance.

When you get started with Vivado, all these steps can seem overwhelming. A good approach is to try and implement a couple of designs over and over, after a while you should get the gist of how things work. Of course, don’t be afraid to read a little documentation.

If you test out your system with push buttons and LED and see the stuff come to life.

This was from one of my tests but I used the green LED (W13) instead of the red on (W14)

Also a fun thing, I did end up modifying my board a little bit by adding two single pole double throw switches to allow me to easily select my boot mode, but that might be a story for another day.

Modded EBAZ4205 NB: I did end up removing the 25 MHz Crystal next to the RJ45 since I did not have the capacitors needed

4 thoughts on “Getting Started with the EBAZ4205 as a Zynq-7000 Development Board

  1. The snap you mentioned which has number of jobs 1 or may be its 4 or 8, during the synthesising the design, this mean the number of your system processing doing the job, if you have the quad core then the number of job will be 4 and same for the 1-2-upto-8.
    However, your this tutorial is amazing and very helpful.

  2. Thank you for very detailed and useful content. I made it!
    The only issue I found with contrains file – in my version of Vivado (2022.2) it expects a bit different syntax:

    ##switch KEY2
    set_property PACKAGE_PIN P19 [get_ports sw0]
    set_property IOSTANDARD LVCMOS33 [get_ports sw0]

    ##switch KEY5
    set_property PACKAGE_PIN V20 [get_ports sw1]
    set_property IOSTANDARD LVCMOS33 [get_ports sw1]

  3. Thanks for a very helpful and informative post about how to get started using the EBAZ4205. I bought one myself for very cheap, and I followed your steps and got as far as programming the board with Vivado. At step 17 I had a small issue because the provided constraints file is missing semicolons at the end. Other than that things went very well.

    I had to ask a cellphone repair technician to rework the extremely tiny 0402 resistor to get the thing to boot from SD/JTAG instead of the NAND flash, since my soldering skills are at their limit with 0603-size devices. 😀 I really would like to see how you wired those switches you have there in the last picture to make boot mode selection easier. It looks like you soldered one of the white wires directly to one of the IO0 or IO2 pins of the NAND flash, the other white wire goes to one of the pads for the mysterious Y2 crystal which people have inferred is possibly part of a real-time clock. The red wires it is unclear where they go. Can you make a post about this someday when you have the time? Thanks!

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